The present invention relates to a noise reduction circuit and more particularly to an active high band weighting circuit.
To construct an active filter on an integrated circuit, a voltage to current converter is an important element.
A block diagram of a conventional noise reduction circuit disclosed in U.S. Pat. No. 4,804,904 is shown in FIG. 1. An input signal from the input terminal 100 is supplied to a variable high-pass filter 200 and an adder 300. The output of the adder 300 is taken out from an output terminal 400. In the variable high-pass filter 200, its cut-off frequency varies by control voltage from a level detector 500 and the cut-off frequency increases with the increase of a signal level. The output of the variable high-pass filter 200 is supplied to the adder 300 and a high band weighting circuit 600. The output of high band weighting circuit 600 is given to the level detector 500.
In the absence of a signal, the cut-off frequency of the variable high-pass filter 200 is in the lowest state. By the adder 300, the input signal and the signal passing the variable high-pass filter 200 are added so that the gains in the middle and high frequency regions are raised by approximately 10 dB. On the other hand, the middle and high frequency regions elevated at the time of recording is attenuated by about 10 dB in a decoding circuit on the reproduction side. As a result, noises in the middle and high frequency regions are attenuated by approximately 10 dB. With the increase of the signal level, the cut-off frequency of the variable high-pass filter 200 is raised and the frequency characteristic of the circuit approaches a flat state. Since the decoding circuit on the reproduction side approaches a flat state, a noise reduction effect decreases. However, in this state, no noise is sensed because a masking effect by the signal works.
The high band weighting circuit 600 is a filtering circuit and acts to increase the cut-off frequency of the variable high-pass filter 200 when an input frequency increases.
The detailed circuit configuration of the high band weighting circuit 600 in the above described noise reduction circuit will be explained with reference to FIG. 2. In FIG. 2, when an input signal Vin is supplied to the bases of the transistors 1 and 7 and when the bases of the transistor 2 and 6 are kept at zero potential, the V-I converting circuit 51 operates with the input signal Vin of a negative level so that a V-I conversion output current is produced by the current of the transistor 1. By the input signal Vin of a positive level, the V-I converting circuit 52 operates so that a V-I conversion output current is produced by the current of the transistor 6.
As the input signal Vin increases, the current i1 decreases. When the input signal Vin becomes almost OV, the current of the transistor 1 assumes 0. When the input signal Vin is higher than OV, the current of the transistor 6 increases.
In this way, by the use of the two V-I converting circuits 51 and 52, the V-I converting circuit 51 operates when the input signal Vin is negative, while the V-I converting circuit 52 operates when the input signal Vin is positive. As a result, no offset voltage Voff appears at the output terminal 17 even if there is offset voltage Vo due to mismatching etc. in respective saturation currents of the diode pairs of the diodes 18, 19 and the diodes 20, 21 and the transistor pairs of the transistors 22, 23 and the transistors 24, 25. This is because the multipliers 53 and 54 are almost cut off in the absence of a signal.
Since multipliers 53 and 54 couples to between the voltage to current converting circuits 51 and 52 and the output stage in the absence of a signal for excluding the effect of offset voltage Voff, there are disadvantages to complicate the circuit construction and to increase the chip size on constructing on an integrated circuit.